Programmable logic devices (PLDs) are widely used in the electronics industry for their many advantages. The usability of a particular PLD may be determined as much by the electronic design automation (EDA) computer systems used to customize its operation for the user as by the resources and capabilities of the hardware itself. EDA systems have displaced the need for a user to know or understand the specifics of the circuitry in the hardware device. The user is shielded from this minutia by the EDA system which accepts a more generic, higher-level version of a circuit design from the user and transforms it to an implementation of the hardware device, taking into consideration all of the details, constraints, dependencies, and restrictions of the device in the process. The magnitude of the work performed by the EDA system in this regard is formidable as evidenced by the intensive computing resources required to compile a user design. And if the user makes a change to the design, even a small one, that considerable work is performed again, as modern EDA compiler theory and design does not assume (or even identify) the benign or limited nature of any design change but rather treats the changed design as a potential opportunity to arrive at an even greater optimization in a hardware implementation. Sometimes, however, a user may have design variations or alternatives that can be reasonably expected to have an obvious and limited impact in the hardware implementation. Until now, however, means were unavailable for a user to determine the differences in alternative hardware implementations in a resource-conserving way.